ASIC Design Engineer

Revolutionizing computing with cutting-edge hardware and software, this startup, led by industry titans and backed by $50 million, is redefining the future. At the forefront of distributed systems, they are developing a groundbreaking fabric that doubles IO per dollar, addressing critical bottlenecks in next-gen computing.

They are seeking a ASIC Design Engineer specialized in RTL design to join their team to work on the host blocks of their accelerated switching fabric, which is the most critical part of their product and their "secret sauce" to eliminating bottlenecks in AI compute systems.

Job Description: ASIC Design engineer

Responsibilities:

• Leading block design from initial analysis and specification to RTL implementation.
• Ensuring designs meet stringent timing, area, reliability, testability, and power requirements.
• Collaborating with software, architecture, and microarchitecture experts to develop high-throughput data processing engines.
• Contributing to verification strategy, test plan development, and execution.
• Supporting performance validation across diverse data center applications.
• Assisting with silicon bring up and post-silicon testing.

Skills and Qualifications:

• Bachelor's degree in Electrical Engineering or Computer Engineering with 7+ years of experience, or Master's degree with 5+ years.
• 3+ years of experience with large, high speed designs.
• Expertise in logic design, including synthesis, P+R constraints, and static timing analysis.
• Proficiency in SystemVerilog, simulators, and waveform debugging.
• Familiarity with scripting languages such as Perl or Python.
• Experience designing high-performance networking or bus protocol systems.